Conventionally, electronic devices (for example, semiconductor chips) include a transmitting circuit and a receiving circuit. For example, electronic devices include an auxiliary device (for example, a memory card) that is detachably attached to a system. The electronic devices transmit and receive information of each other by performing, for example, high-speed serial communication using differential signals. The receiving circuit of such an electronic device includes a comparison circuit (comparator) that responds to differential signals (see, for example, Patent Document 1).
FIGS. 10A and 10B illustrate examples of a receiving circuit including a comparison circuit.
In a receiving circuit 201 illustrated in FIG. 10A, differential input signals DLIP, DLIN are input to the gates of the N-channel MOS transistors TN201, TN202, and complementary output signals QOP, QON are output. The receiving circuit 202 illustrated in FIG. 10B includes a pre-amplifier 202a including the N channel MOS transistors TN203, TN204 which receive input of the differential input signals DLIP, DLIN at the respective gates; and a comparison circuit 202b for comparing the output signals VP, VN of the pre-amplifier 202a, and the receiving circuit 202 outputs complementary output signals QOP, QON.
Incidentally, among a plurality of the electronic devices that communicate with each other by differential signals as described above, there are cases where a difference arises in the ground potential. In order to enable communication among the electronic devices having different ground potentials as described above, there is a specification in which the common-mode voltage of the differential signals (the intermediate voltage of the differential signals) is set to be a wide range, for example, 50 mV through 400 mV. It is not possible to use the receiving circuit 201 illustrated in FIG. 10A or the receiving circuit 202 illustrated in FIG. 10B for communication according to such a specification.
With respect to the above problem, one approach is to use a receiving circuit in which an operational amplifier is provided at a stage before the comparison circuit.
For example, a receiving circuit 203 illustrated in FIG. 11 includes a Rail to Rail type operational amplifier 203a and a comparison circuit 203b for comparing the output signals of the operational amplifier 203a. A Rail to Rail type operational amplifier is disclosed in, for example, Patent Document 2. Furthermore, a receiving circuit 204 illustrated in FIG. 12 includes a voltage regulator circuit (Regulator) 204b for regulating the power-supply voltage VDA of an operational amplifier 204a, and a comparison circuit 204c for comparing the output signals of the operational amplifier 204a. These operational amplifiers 203a, 204a receive differential input signals DLIP, DLIN, and generate differential output signals VIP, VIN having an amplitude center that is half the power-supply voltage VDA, with respect to the comparison circuit 204c. 
Patent Document 1: Japanese Laid-Open Patent Publication No. 2013-143626
Patent Document 2: Japanese Laid-Open Patent Publication No. 2001-60832
Incidentally, in the receiving circuits 203 and 204 respectively illustrated in FIGS. 11 and 12, the waveform distortion of the differential output signals VIP, VIN respectively supplied to the comparison circuits 203b, 204c, affects the comparison results. As high-speed communication is performed, a wide signal bandwidth is needed in the operational amplifiers 203a, 204a. According to a mutual conductance gm and a capacitance value C, the signal bandwidth GBW is approximated as follows.GBW=gm/C The relationship between the current Ids of the MOS transistor included in the operational amplifier and the signal bandwidth GBW is expressed as follows.
                              Ids          =                                                    μ                ⁢                                                                  ⁢                Cox                            2                        ·                          W              L                        ·                                          (                                  Vgs                  -                  Vth                                )                            2                                      ⁢                                  ⁢                  Veff          =                      (                          Vgs              -              Vth                        )                          ⁢                                  ⁢                  gm          =                                    2              ×              Ids                        Veff                          ⁢                                  ⁢                                                            GBW                =                                ⁢                                                      gm                    1                                    C                                                                                                        =                                ⁢                                                      2                    ×                    Ids                                                        Veff                    ×                    C                                                                                                          [                  Formula          ⁢                                          ⁢          1                ]            Note that the above formula is an approximation formula. In the above formula, Vgs is the gate-source voltage, Veff is the effective gate voltage, μ is the mobility (carrier mobility),Cox is the gate capacity, W is the gate width, L is the gate length, Vth is the threshold voltage, and Ids is the drain-source current.
Therefore, in order to expand the width of the signal bandwidth GBW, the current Ids flowing to the MOS transistor needs to be increased. Therefore, as described above, the operational amplifiers 203a, 204a, which are respectively provided in a stage before the comparison circuits 203b, 204c, increase the power consumption of the receiving circuits 203, 204, respectively, and eventually increases the power consumption of the corresponding electronic devices.